In the last few years a wide range of solutions have been developed in order to increase the efficiency of power semiconductor devices, in particular in terms of increase in the breakdown voltage and decrease in the output resistance.
For example, U.S. Pat. Nos. 6,586,798, 6,228,719, 6,300,171 and 6,404,010, all commonly owned and incorporated by reference, describe vertical-conduction power semiconductor devices, wherein, within an epitaxial layer forming part of a drain region having a given conductivity type, columnar structures of opposite conductivity are formed. These columnar structures have a dopant concentration equal and opposite to the dopant concentration of the epitaxial layer, so as to enable a substantial charge balance (the so-called multi-drain or MD technology). The charge balance enables high breakdown voltages to be obtained, and, in addition, the high dopant concentration of the epitaxial layer enables a low output resistance (and hence low losses in conduction) to be obtained. The use of MD technology has enabled the so-called “ideal limit of silicon” to be overcome.
In summary, the formation of the aforesaid columnar structures envisages a sequence of steps of growth of N-type epitaxial layers, each step being followed by a step of implantation of a P-type dopant. The implanted regions are stacked so as to form the columnar structures. Next, body regions of the power device are formed in contact with the columnar structures, so that the columnar structures constitute an extension of the body regions within the drain region.
The evolution of said technology has witnessed a progressive increase in the density of the elementary strips forming the devices in order to further increase the concentration of charge of the epitaxial layer and to obtain devices which, given the same breakdown voltage (which is substantially related to the height of the columnar structures), have a lower output resistance. On the other hand, however, the increase in the density of the elementary strips entails a corresponding increase in the number of the steps of epitaxial growth and a reduction in the thermal budget of the devices, and consequently an increase in the manufacturing costs and times, and in the defectiveness intrinsically linked to the steps of epitaxial growth.
Alternative technologies have consequently been developed to obtain the charge-balance columnar structures, said technologies envisaging, for example, formation of trenches within the epitaxial layer and subsequent filling of said trenches with semiconductor material appropriately doped to obtain the charge balance.
For example, solutions are known according to which the trenches are filled via steps of epitaxial growth of semiconductor material (see for example U.S. Pat. No. 6,495,294, US 2003224588 and US 2003219933 which are incorporated by reference), possibly alternated by steps of etching of surface-growth portions. In particular, a non-selective epitaxial growth also involves a top surface of the layer in which the trenches are provided, and at the end of the epitaxial process a wrinkled surface layer of semiconductor material is consequently formed, characterized by the presence of a plurality of grooves in areas corresponding to the columnar structures. The known techniques envisage removal of the wrinkled surface layer via the CMP (Chemical-Mechanical Polishing) technique in order to planarize the top surface prior to formation of body, gate and source structures of the power devices.
As a whole, the solutions described for obtaining power devices with charge-balance structures may not be satisfactory, either as regards the complexity and costs of their manufacturing and as regards attainment of a real charge balance (for example, due to a poor uniformity of the spatial charge distribution or due to the presence of residual defects).